The Atmel ATtiny828 8-bit AVR RISC-based microcontroller (MCU) with picoPower technology features 8KB of in-system programmable (ISP) Flash, 256-byte ISP EEPROM, 512-byte internal SRAM, 8-bit timer/counter and 16-bit timer/counter with PWM, 10-bit ADC,USART, TWI, 2x SPI, 32KHz ultra low power oscillator, +-2% accurate 8MHz internal oscillator and debugWIRE for on-chip-debug. The ATtiny828 MCU has 28 GPIO pins and ADC channels available on all pins. By executing powerful instructions in a single clock cycle, the ATtiny828 device achieves throughputs approaching 1MIPS per MHz, allowing you to optimize power consumption versus processing speed. The device also has a boot section and supports read while write self-programming of Flash. The device is manufactured using Atmel's high density non-volatile memory technology. The Flash program memory can be re-programmed in-system through a serial interface, by a conventional non-volatile memory programmer or by an on-chip boot code, running on the AVR core. The boot program can use any interface to download the application program to the Flash memory. Software in the boot section of the Flash executes while the application section of the Flash is updated, providing true read-while-write operation. The ATtiny828 AVR is supported by a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators and evaluation kits.     The AVR core combines a rich instruction set with 32 general purpose working registers. All 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in a single instruction, executed in one clock cycle. The resulting architecture is compact and code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.In order to maximize performance and parallelism, the AVR uses a Harvard architecture – with separate memories and buses for program and data. Instructions in the Program memory are executed with a single level pipelining. While one instruction is being executed, the next instruction is pre-fetched from the Program memory. This concept enables instructions to be executed in every clock cycle. The Program memory is In-System Reprogrammable Flash memory. The fast-access Register File contains 32 x 8-bit general pur pose working registers with a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typical ALU operation, two operands are output from the Register File, the operation is executed, and the result is stored back in the Register File – in one clock cycle. Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data Space addressing – enabling efficient address calculations. One of the these address pointers can also be used as an address pointer for look up tables in Flash Program memory. These added functi on registers are the 16-bit X-, Y-, and Z-register, described later in this section. The ALU supports arithmetic and logic operations between registers or between a constant and a register. Single register operations can also be executed in the ALU. After an arithmetic operation, the Status Register is updated to reflect information about the result of the operation.